Idea:

* reduce image size
* increace nand performance (maybe GPMC CLK and NAND Timing)
* implement Multiple_XIP_Regions (winCE)



==win ce==
http://processors.wiki.ti.com/index.php/WinCE-BSP_ARM-A8_User_Guide

forum discuss：http://e2e.ti.com/support/embedded/wince/f/353/t/212437.aspx


http://processors.wiki.ti.com/index.php/Supporting_Multiple_XIP_Regions_in_WinCE_BSP